Servo systems are commonly used in disk drives to control the position of a read/write head. Head positional information is typically contained in tracking control signals which are stored on, and read from, a disk. Servo systems include analog demodulation circuitry for demodulating the tracking control signals and conversion circuitry for digitizing the demodulated signals. Digital circuitry processes the digitized signals and calculates a digital error signal representing the physical distance and/or direction between the desired and the actual head position. The error signal is converted to an analog voltage which is used to control and correct the position of the head.
Principally two approaches have been used to provide tracking control signals indicative of position on a disk surface. In the first approach, tracking control signals are stored on a separate surface (from that on which data is stored) of a multi-surface disk. In the second approach, in an effort to save disk space, it has become increasingly common for disk manufacturers to embed short duration servo bursts (tracking control signals) in dedicated servo areas interspersed between data storage areas, both on single-surface and on multi-surface disks. Typically, a repeated pattern of several (e.g., four) servo bursts is embedded on the disk. In each pattern, the bursts are substantially arranged along a track so that the bursts will be sequentially read if the head stays on the track. Each burst in the pattern is radially offset from the track and with respect to the other bursts. The relative amplitudes of the signal bursts (or, correspondingly, the integrated values of the detected bursts) read by the head provide information from which the head position (relative to the track) can be determined and, thus, is used to generate a positional error signal.
Prior art servo systems have been developed with circuitry for demodulating and digitizing embedded servo bursts. The demodulation circuitry of such systems typically includes circuitry for sequentially determining the amplitude of (or integrated area beneath) each signal burst within a pattern. The amplitude (or, as an alternative, the area) information for each burst is stored separately in the form of a detected analog voltage (or corresponding charge). Upon demodulation of the last burst of the pattern, conversion circuitry then sequentially digitizes and stores the analog voltage for each burst for subsequent head position correction.
One such prior art servo system is shown in FIG. 1 and includes input leads 10 and 12 for respectively receiving the differential, AC-coupled, input signals V.sub.IN + and V.sub.IN - from a read head which reads, for example, four sequential burst signals A, B, C and D of a pattern. Typical signal bursts A, B and C, as read by a head, are shown in FIG. 2 (burst D is not shown). The signal bursts A, B, C and D commonly have the same frequency, which generally ranges from 3-10 MHz. The signal bursts generally have the same amplitude on the disk but the signal bursts read from the disk by the head have different amplitudes (as shown in FIG. 2) due to the radial position of the head with respect the signal bursts (which are themselves radially offset from one another). In FIG. 1, area detect circuitry 14 separately and sequentially rectifies and integrates each burst to determine the "area" under each signal burst, and temporarily stores a voltage representing the area information. Analog-to-digital converter ("ADC") 26 then sequentially digitizes the stored voltages for the bursts A, B, C and D.
Area detect circuitry 14 includes a full-wave rectifier 18, an operational transconductance amplifier (OTA) 16, an integrator 20 and a stack 22 of four track-and-hold amplifiers (T/H) 22A-22D. As will be readily understood by those skilled in the art, the full-wave rectifier 18 rectifies the differential voltage received on leads 10 and 12 and provides the rectified voltages to OTA 16. OTA 16 then translates the rectified voltages to a driving current and provides the same to integrator 20. Integrator 20 integrates the driving current. Those skilled in the art will understand that integrator 20 includes a capacitor which is charged by the driving current signal and that the accumulated charge (and corresponding voltage) represents (i.e., is proportional to) the area beneath the driving current signal waveform. For each burst, a voltage representing the area is thus output by the integrator. Those skilled in the art will also appreciate that peak detect circuitry could alternatively be used to demodulate the signal bursts but that area detect circuitry is more immune to noise (e.g., spikes in the signal bursts).
The output voltages of the integrator for bursts A, B, C and D are stored in the four track-and-hold amplifiers T/H 22A, T/H 22B, T/H 22C and T/H 22D, respectively. For each burst, the output voltage of the integrator is "tracked" by a capacitor in the appropriate track-and-hold amplifier and, upon completion of the integration of that burst, the instantaneous voltage is "held" by the track-and-hold amplifier capacitor to enable subsequent digitization.
Upon demodulation of each of the bursts in the pattern, ADC 26 then sequentially converts to a digital signal each held analog voltage of a T/H 22A-22D. A multiplexer (not shown) sequentially provides the analog voltage outputs of the track-and-hold amplifiers along line 24 to ADC 26 for the bursts A, B, C and D. For each signal burst, the ADC 26 outputs a digital value (at a resolution of, e.g., 10-bits) representing the area information. The digital signal outputs of the ADC for the bursts A, B, C and D are sequentially fed along lines (or bus) 28 and stored in the registers labeled 30A, 30B, 30C and 30D, respectively, of register stack 30.
Once stored, the digital information is fed along lines (bus) 32 to microprocessor 34 which calculates an error signal. The error signal is provided on lines (bus) 36 to digital-to-analog converter ("DAC") 38. The DAC 38 provides an analog output signal along line 40 to DAC output amplifier 42 which, in turn, provides an output signal on line 44 to control and correct the head position (i.e., via a motor, not shown).
In such a prior art system, a delay occurs between the demodulation of each signal burst and the conversion of the demodulated signal burst. The delay occurs because a demodulated burst, burst A, for example, is not digitized until after each of the other bursts, bursts B, C and D in this example, has been demodulated. As a result of the delay, the read/write head may drift off the desired track. Additionally, the delay in conversion causes a delay in the positional correction of the head. Such effects may, in turn, cause faulty or inaccurate disk drive operation.
In addition to the delay in conversion, the area detect circuitry of such a prior art system can operate inaccurately. In particular, the voltage-mode full-wave rectifier can cause non-linearity errors. Additionally, the simple current mirror circuitry (consisting of multiple PMOS transistors) (not shown) used in the prior art demodulation circuitry can also cause non-linearity errors.
It is therefore a general object of the present invention to provide an improved servo system demodulation circuit for reducing non-linearity errors.